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A Reconfigurable Single-Photon-Counting Integrating Receiver for Optical Communications

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3 Author(s)
Edward Fisher ; The Institute for Microelectronics and Nanosystems, The School of Engineering, The College of Science and Engineering, The University of Edinburgh ; Ian Underwood ; Robert Henderson

A reconfigurable Single-Photon Avalanche Diode integrating receiver in standard 130 nm CMOS is presented for optical links with an array readout bandwidth of 100 MHz. A maximum count rate of 58 G photon/s is observed, with a dynamic range of ≈ 79 dB, a sensitivity of ≈ - 31.7 dBm at 100 MHz and a BER of ≈ 1 ×10-9. The sensor core draws 89 mW at the maximum count rate and obtains a peak SNR of ≈157 dB. We investigate the properties of the receiver for optical communications in the visible spectrum, using its added functionality and reconfigurability to experimentally explore non-ideal influences. The all-digital 32 × 32 SPAD array, achieves a minimum dead time of 5.9 ns, and a median dark count rate of 2.5 kHz/SPAD. The internal gain of SPADs and spatio-temporal summation removes the need for analogue amplification. High noise devices can be weighted or removed to optimize the SNR. The power requirements, transient response and received data are explored and limiting factors similar to those of photodiode receivers are observed.

Published in:

IEEE Journal of Solid-State Circuits  (Volume:48 ,  Issue: 7 )