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A 265 V _{\rm RMS} Mains Interface Integrated in 0.35 \mu m CMOS

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3 Author(s)
Hans Meyvaert ; Katholieke Universiteit Leuven, Heverlee, Belgium ; Patrick Smeets ; Michiel Steyaert

A fully integrated 265 VRMS input AC-DC interface is demonstrated in a 0.35-μm CMOS technology, requiring only one optional external low-voltage SMD capacitor for improved performance. The converter can directly interface the universal line voltage (50-60 Hz) and converts this into a regulated DC voltage of 3.3 V. High input voltage operation is made possible through separation of the mains input from the active circuits by custom layout high-voltage capable passive components in between. A compact model of an ideal AC-DC capacitive step-down converter is presented and the proposed circuit architecture is designed to mimic ideal operation and approach the maximum attainable power throughput accordingly. The prototype converter demonstrates a maximum output power of 12.7 μW on a die area of 6 mm2 and enables integrated circuits to be supplied straight from the ubiquitous mains voltage, hereby circumventing the need for traditional converters using expensive and bulky high-voltage discrete components.

Published in:

IEEE Journal of Solid-State Circuits  (Volume:48 ,  Issue: 7 )