Scheduled System Maintenance on May 29th, 2015:
IEEE Xplore will be upgraded between 11:00 AM and 10:00 PM EDT. During this time there may be intermittent impact on performance. We apologize for any inconvenience.
By Topic

An Efficient Interpolation-Based Chase BCH Decoder

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

1 Author(s)
Xinmiao Zhang ; Case Western Reserve Univ., Cleveland, OH, USA

BCH codes are adopted in many systems, such as flash memory, optical communications, and digital video broadcasting. By trying 2η test vectors, the soft-decision Chase decoding algorithm of BCH codes can achieve significant coding gain over hard-decision decoding. Previous one-pass Chase schemes find the error locators based on the Berlekamp's algorithm and need hardware-demanding selection methods to decide which locator corresponds to the correct code word. In this brief, a novel interpolation-based one-pass Chase decoder is proposed for BCH codes. By making use of the binary property of BCH codes, an innovative yet low-complexity method is developed to select the interpolation output leading to successful decoding without bringing any performance loss. The code word recovery step is also significantly simplified through nontrivial mathematical derivations. From architectural analysis, the proposed decoder with η = 4 for a (4200, 4096) BCH code has 2.3 times higher efficiency in terms of throughput-over-area ratio than the prior one-pass Chase decoder based on the Berlekamp's algorithm, while achieving the same error-correcting performance.

Published in:

Circuits and Systems II: Express Briefs, IEEE Transactions on  (Volume:60 ,  Issue: 4 )