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A 65 nm Low-Power Adaptive-Coupling Redundant Flip-Flop

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6 Author(s)
Masuda, M. ; Grad. Sch. of Sci. & Technol., Kyoto Inst. of Technol., Kyoto, Japan ; Kubota, K. ; Yamamoto, R. ; Furuta, J.
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We propose a low-power redundant flip-flop to be operated with high reliability over 1 GHz clock frequency based on the low-power (ACFF) and the highly-reliable (BCDMR) flip-flops. Its power dissipation is almost equivalent to the transmission-gate FF at 10% data activity while paying 3 × area penalty. Experiments by α-particle and neutron irradiation reveal its highly-reliable operations with no error at 1.2 V and 1 GHz. We measured five different process corner chips by α irradiation. Soft error rates are almost equivalent in these corner chips.

Published in:

Nuclear Science, IEEE Transactions on  (Volume:60 ,  Issue: 4 )

Date of Publication:

Aug. 2013

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