By Topic

All-Digital Background Calibration Technique for Time-Interleaved ADC Using Pseudo Aliasing Signal

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Matsuno, J. ; Corp. R&D Center, Toshiba Corp., Kawasaki, Japan ; Yamaji, T. ; Furuta, M. ; Itakura, T.

A new digital background calibration technique for gain mismatches and sample-time mismatches in a Time-Interleaved Analog-to-Digital Converter (TI-ADC) is presented to reduce the circuit area. In the proposed technique, the gain mismatches and the sample-time mismatches are calibrated by using pseudo aliasing signals instead of using a bank of adaptive FIR filters which is conventionally utilized. The pseudo aliasing signals are generated and subtracted from an ADC output. A pseudo aliasing generator consists of the Hadamard transform and a fixed FIR filter. In case of a two-channel 10-bit TI-ADC, the proposed technique reduces the requirement for a word length of the FIR filter by about 50% without a look-up table (LUT) compared with the conventional technique. In addition, the proposed technique requires only one FIR filter compared with the bank of adaptive filters which requires (M-1) FIR filters in an M-channel TI-ADC.

Published in:

Circuits and Systems I: Regular Papers, IEEE Transactions on  (Volume:60 ,  Issue: 5 )