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Impact of ultra low power and fast write operation of advanced perpendicular MTJ on power reduction for high-performance mobile CPU

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13 Author(s)
Kitagawa, E. ; Corp. R&D Center, Toshiba Corp., Kawasaki, Japan ; Fujita, S. ; Nomura, K. ; Noguchi, H.
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We demonstrated lower power consumption of mobile CPU by replacing high-performance (HP)-SRAMs with spin transfer torque (STT)-MRAMs using perpendicular (p)-MTJ. The key points that enable the low power consumption are adapting run time power gating architecture (shown in Fig. 1), and satisfying both fast and low-power writing, namely, 3 nsec and 0.09 pJ, of p-MTJ cell (shown in Fig. 3). As shown in Table 1, only our developed p-MTJ has achieved 3 nsec, 0.09 pJ. Thanks to the fast and low-power p-MTJ, the power consumption of cache memory could be reduced by over 80% without degradation of performance.

Published in:

Electron Devices Meeting (IEDM), 2012 IEEE International

Date of Conference:

10-13 Dec. 2012

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