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This paper presents the superior performance of UTBB (Ultra-Thin Box and Body) technology for providing high speed at low voltage. We evidence the transistor capability to sustain full forward-body-biasing solution thanks to a planar back-side gate scheme. Silicon measurements on low complexity circuits show that the dynamic power consumption can be reduced by 90% without any speed degradation by simply selecting the appropriate power supply and body bias couple (Vdd; Vbb). A simple switching energy efficiency model is then proposed allowing the (Vdd; Vbb) couple prediction reaching the minimum energy point. Finally, we demonstrate on a full CPU Core implementation with UTBB a total power reduction of -30% and a +40% energy efficiency at identical speed with respect to bulk technology thanks to back side gate biasing efficiency.