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A 1.5 mW 26.2–32.2 GHz divide-by-4 injection-locked frequency divider in 130 nm CMOS process

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3 Author(s)
Ya-Nan Sun ; State Key Lab. of ASIC & Syst., Fudan Univ., Shanghai, China ; Wei Li ; Chang-Ming Chen

This paper presents a novel divide-by-4 injection-locked frequency divider (ILFD) which is able to work with either a differential input signal or an identical input signal at the dual- port input. It consists of two cascaded divide-by-2 LC-resonance ILFDs. By using dual-injection technique only (both direct injection and tail injection), the locking range of the proposed divide-by-2 ILFDs is enhanced. Meanwhile only NMOS transistor is used in the proposed circuit to minimize the power consumption. At the same time, their structure is optimized for the divide-by-4 ILFD. Simulation is done with 130 nm RF-CMOS process. Without any tuning varactors, at the input power of 0 dBm the maximum locking range of the divider-by-4 ILFD can be achieved respectively at 26.2~30.2GHz (13.7%) with differential input signal, and at 25.9~30.6GHz (16.2%) with identical input signal. Its dc power consumption is less than 1.5 mW from a 0.8 V supply voltage which is very attractive.

Published in:

Solid-State and Integrated Circuit Technology (ICSICT), 2012 IEEE 11th International Conference on

Date of Conference:

Oct. 29 2012-Nov. 1 2012