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Effect of electrical stress on the Al2O3-based 4H-SiC MOS capacitor with a thin SiO2 interface buffer layer

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9 Author(s)
Yi-Men Zhang ; Key Lab. of Wide Band-Gap Semicond. Mater. & Devices, Xidian Univ., Xi'an, China ; Qing-Wen Song ; Yu-Ming Zhang ; Xiao-Yan Tang
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The effect of electrical stress on the Al2O3-based n-4H-SiC metal oxide semiconductor (MOS) capacitor with a thin SiO2 interfacial buffer layer (IBL) has been investigated. The electrical characteristics of MOS capacitors have been measured using capacitance-voltage (C-V), current-voltage (I-V) and charge trapping behavior of the films under constant voltage stressing (CVS) to understand the reliability and the interface trapping characteristics of Al2O3/SiO2/n-4H-SiC gate stack. It is found that Al2O3/SiO2 stack layer has lower positive charge generation and smaller flatband voltage shift under constant voltage stressing, which exhibits an excellent interface quality and high dielectric reliability making this structure suitable for 4H-SiC power devices applications.

Published in:

Solid-State and Integrated Circuit Technology (ICSICT), 2012 IEEE 11th International Conference on

Date of Conference:

Oct. 29 2012-Nov. 1 2012

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