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Including process-related variability in soft error rate analysis of advanced logic design down to 28 nm based on a foundry PDK

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4 Author(s)
Li, M. ; Platform Design Autom. Inc., Beijing, China ; Li, Y.F. ; Schrimpf, R.D. ; Fleetwood, D.M.

We have developed a statistical soft error rate (SER) analysis that incorporates response surface modeling and a neuron modeling algorithm, which is calibrated to silicon. Experimental results verify faster and more accurate SER estimation.

Published in:

Solid-State and Integrated Circuit Technology (ICSICT), 2012 IEEE 11th International Conference on

Date of Conference:

Oct. 29 2012-Nov. 1 2012