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A case analysis of system partitioning and its relationship to high-level synthesis tasks

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2 Author(s)
Zhang Yang ; Dept. of Inf. & Comput. Sci., California Univ., Irvine, CA, USA ; R. K. Gupta

In this paper, we investigate the relationship between partitioning and high-level synthesis tasks, namely operation scheduling and resource allocation/binding. The interaction between partitioning and synthesis tasks is explored using IP formulations for four different design approaches representing different strategies for high-level synthesis. The results are quantified by varying three design parameters, namely the partition size bound, resource size bound and latency margin bound. Experimental results show the tradeoff between the quality of synthesis results and the computation cost for different design approaches, while simultaneous partitioning and synthesis tasks gives the best results, and the computational efficiency can be improved by separating scheduling from partitioning

Published in:

VLSI Design, 1998. Proceedings., 1998 Eleventh International Conference on

Date of Conference:

4-7 Jan 1998