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A stochastic method for defect level analysis of pseudorandom testing

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2 Author(s)
Wen-Ben Jone ; Dept. of Comput. Sci., Nat. Chung-Cheng Univ., Chiayi, Taiwan ; Das, S.R.

Pseudorandom testing has been widely used in built-in self-testing of VLSI circuits. Although the defect level estimation for pseudorandom testing has been performed using sequential statical analysis, no closed form can be accomplished as complex combinatorial enumerations are involved. In this work, a Markov model is employed to describe the pseudorandom test behaviors. For the first time, a closed form of the defect level equation is derived by solving the differential equation extracted from the Markov model. The defect level equation clearly describes the relationships among defect level, fabrication yield, the number of all input combinations, circuit detectability (in terms of the worst single stuck-at fault), and pseudorandom test length. Although our discussions are primarily based on the single stuck-at fault model, it is not difficult to extend the results to other fault types

Published in:

VLSI Design, 1998. Proceedings., 1998 Eleventh International Conference on

Date of Conference:

4-7 Jan 1998