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A 1-V 1-GS/s 6-bit low-power flash ADC in 90-nm CMOS with 15.75 mW power consumption

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2 Author(s)
Kirankumar Lad ; Department of Electronics and Communication, National Institute Of Technology Karnataka, Surathkal-575025, India ; M S Bhat

A 1-V 1-GS/s 6-bit low power flash ADC in 90 nm CMOS technology is presented. Proposed Flash ADC consists of reference generator, comparator array, 1-out-of N code generator, Fat tree encoder and output D-latches. This Flash ADC achieves 5.76 ENOB at Nyquist input frequency without calibration. The measured peak INL and DNL are 0.08LSB and 0.1LSB, respectively. The proposed ADC consumes 15.75 mW from 1V supply and yielding an energy efficiency of 0.291 pJ/conv while operating at 1 GS/s.

Published in:

Computer Communication and Informatics (ICCCI), 2013 International Conference on

Date of Conference:

4-6 Jan. 2013