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SAR ADC architecture with 98% reduction in switching energy over conventional scheme

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2 Author(s)
A. Sanyal ; Electrical and Computer Engineering Department, The University of Texas at Austin, 2501 Speedway, Stop 00803, Austin, Texas 78712, USA ; N. Sun

A high energy-efficiency switching scheme for a successive approximation register (SAR) analogue-to-digital converter (ADC) is presented. The proposed method can achieve 98.4% savings in switching energy when compared to a conventional SAR. The proposed technique also achieves a 4 % reduction in total capacitance used in the digital-to-analogue converter (DAC) compared to the conventional DAC.

Published in:

Electronics Letters  (Volume:49 ,  Issue: 4 )