By Topic

SAR ADC architecture with 98% reduction in switching energy over conventional scheme

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $31
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Sanyal, A. ; Electr. & Comput. Eng. Dept., Univ. of Texas at Austin, Austin, TX, USA ; Sun, N.

A high energy-efficiency switching scheme for a successive approximation register (SAR) analogue-to-digital converter (ADC) is presented. The proposed method can achieve 98.4% savings in switching energy when compared to a conventional SAR. The proposed technique also achieves a 4 % reduction in total capacitance used in the digital-to-analogue converter (DAC) compared to the conventional DAC.

Published in:

Electronics Letters  (Volume:49 ,  Issue: 4 )