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The energy budget of embedded instruction-set processor platforms is significantly affected by the Instruction Memory Organisation. Due to the fact that the design space of the enhancements for reducing the energy consumption of this component is huge, this paper proposes a high-level energy estimation tool that, for a given application and compiler, allows the exploration not only of architectural and compiler configurations, but also of code transformations that are related to the Instruction Memory Organisation. The proposed tool, with a mean error of 3.95%, achieves reductions in time and effort to explore the design space of the Instruction Memory Organisation.
Date of Conference: 9-12 Dec. 2012