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Design and implementation of the multicore architecture teaching experiment platform

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4 Author(s)
Qian Wang ; State Key Lab. of High Performance Comput., Nat. Univ. of Defense Technol., Changsha, China ; Yuhua Tang ; Zongbo Li ; Jin Wang

With the continuous improvement of integrated circuit technology, the new low-power, multicore architecture to replace the previous single core processor architecture has become an inevitable trend of development. The emergence of multicore architectures will lead teaching courses face the problem that the experiments contents should be updated. Under such demand, this article reforms the teaching experiments on the computer architecture courses and completes design and implementation of a multicore architecture computer experiment platform based on Tianhe Sunshine development board. This article makes an analysis of Beehive experiment platform which is based on the XUPV5 development board. On this basis, according to Tianhe Sunshine development board's hardware configuration, we design single core processor, DDR controller and the communication module which can exchange information between PC and board, complete the multicore architecture teaching experiment platform based on message passing model. Finally, this article simulates and verifies the multicore architecture platform functionality. The results of the test show that the designed modules achieved their functions.

Published in:

Advanced Computational Intelligence (ICACI), 2012 IEEE Fifth International Conference on

Date of Conference:

18-20 Oct. 2012

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