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A CMOS linear power amplifier for wireless local area network IEEE 802.11b/g application is presented. To achieve high linear output power and high efficiency, a large-signal multigated transistor linearization method is proposed with an envelope injection gate bias circuit. A novel inter-stage matching transformer, which functions as a power splitter, is designed to implement this method. It is fabricated with a TSMC 0.13-μm standard RF CMOS process. Measurement shows 19.5-dBm Pout with 24.8% power-added efficiency (PAE) at - 25-dB error vector magnitude with an orthogonal frequency-division multiplexing 64-QAM 54-Mb/s 802.11g signal source and 23.15-dBm Pout with 31.73% PAE with DSSS, CCK, and 11-Mb/s 802.11b signal source without digital pre-distortion.
Microwave Theory and Techniques, IEEE Transactions on (Volume:61 , Issue: 3 )
Date of Publication: March 2013