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Generation of Functional Broadside Tests for Logic Blocks With Constrained Primary Input Sequences

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1 Author(s)
Irith Pomeranz ; School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA

This paper describes a test generation procedure that produces functional broadside tests for logic blocks whose primary input sequences are constrained. The constraints are created during functional operation by logic blocks that drive the logic block under consideration. Functional broadside tests avoid overtesting of delay faults by creating functional operation conditions during the clock cycles where delay faults are detected. Test generation procedures for functional broadside tests typically assume that the primary input sequences are unconstrained during functional operation. This paper shows that the constraints, which are imposed by a logic block driving the primary inputs of another block, can be time dependent and difficult to represent compactly. The test generation procedure described in this paper addresses this issue by separating the problem of test generation into the generation of constrained primary input sequences for the block under consideration, and the extraction of functional broadside tests from these sequences.

Published in:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  (Volume:32 ,  Issue: 3 )