Cart (Loading....) | Create Account
Close category search window

Low power Multi-Threshold MOS Current Mode Logic asynchronous pipeline circuits

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Gupta, K. ; Dept. of Electron. & Commun., Delhi Technol. Univ., New Delhi, India ; Pandey, N. ; Gupta, M.

In this paper, low-power Multi-Threshold MOS Current Mode Logic (MT-MCML) asynchronous pipeline circuits have been proposed. The circuits employ the use of multiple threshold MOS transistors to reduce the supply voltage requirement thereby decreasing their power consumption. The proposed circuits have been implemented and simulated in PSPICE using 0.18 μm CMOS technology parameters. Their performance with the conventional MCML circuits indicates that the proposed circuits consume less power than the conventional ones.

Published in:

Power Electronics (IICPE), 2012 IEEE 5th India International Conference on

Date of Conference:

6-8 Dec. 2012

Need Help?

IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.