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An embedded 240-mW 10-b 50-MS/s CMOS ADC in 1-mm2

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2 Author(s)
Bult, K. ; Broadcom Corp., Irvine, CA, USA ; Buchwald, A.

A distributed-gain preamplifier uses averaging to improve resolution by 4 b in differential nonlinearity (DNL) and 2 b in integral nonlinearity (INL) in a flash analog-to-digital converter (ADC). Fabricated in a 0.5-μm, triple-metal, single-poly CMOS process, the circuit measures 1.4 mm×1.4 mm including a bandgap and a sample-and-hold (SH), while the ADC itself occupies 1-mm2. At a conversion rate of 50-MS/s the ADC dissipates 170 mW, the SH dissipates 70 mW, and the untrimmed ADC-plus-SH exhibits 54 dB S/(N+D) with a 12-MHz 90% full-scale input

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:32 ,  Issue: 12 )