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Compilers for instruction-level parallelism

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6 Author(s)
Schlansker, M. ; Hewlett-Packard Labs., Palo Alto, CA, USA ; Conte, T.M. ; Dehnert, J. ; Ebcioglu, K.
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Discovering and exploiting instruction level parallelism in code will be key to future increases in microprocessor performance. What technical challenges must compiler writers meet to better use ILP? Instruction level parallelism allows a sequence of instructions derived from a sequential program to be parallelized for execution on multiple pipelined functional units. If industry acceptance is a measure of importance, ILP has blossomed. It now profoundly influences the design of almost all leading edge microprocessors and their compilers. Yet the development of ILP is far from complete, as research continues to find better ways to use more hardware parallelism over a broader class of applications

Published in:

Computer  (Volume:30 ,  Issue: 12 )