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A 0.25 V 460 nW Asynchronous Neural Signal Processor With Inherent Leakage Suppression

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2 Author(s)
Liu, T.-T. ; Berkeley Wireless Research Center, University of California, Berkeley, ; Rabaey, J.M.

Further power and energy reductions via technology and voltage scaling have become extremely difficult due to leakage and variability issues. In this paper, we present a robust and energy-efficient computation architecture exploiting an asynchronous timing strategy to dynamically minimize leakage and to self-adapt to process variations and different operating conditions. Based on a logic topology with built-in leakage suppression, the prototype asynchronous neural signal processor demonstrates robust sub-threshold operation down to 0.25 V, while consuming only 460 nW in 0.03 {\rm mm}^{2} in a 65 nm CMOS technology. These results represent a 4.4 \times reduction in power, a 3.7 \times reduction in energy and a 2.2 \times reduction in power density, when compared to the state-of-the-art processors.

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:48 ,  Issue: 4 )