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A comparative performance evaluation of different application domains on server processor architectures

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2 Author(s)
Roshan Weerasuriya ; University of Colombo School of Computing, Sri Lanka ; Nalin Ranasinghe

In this paper we analyze and describe the impact of processor performance parameters such as: `Resource Stalls, Branch Mis-predictions, Translation Lookaside Buffer (TLB) Misses and Cache Misses' on the performance of different application domains and we analyze how this behavior varies among server processor architectures. We analyze the variant behavior of those processor performance parameters, among different application domains. We carry out this research based on two server microprocessors namely `single processor quad core Intel Xeon E5506' and `dual processor dual core AMD Opteron 2220 SE'. Our findings show that the above parameters makes a major impact in the performance of applications and we find that this behavior varies from application domain to domain and microprocessor to microprocessor. We have evaluated the performance of the two micro-architectures by analyzing the performance statistics obtained from the respective microprocessor hardware performance monitoring counters. In this paper we summarize our results with respect to above discussion made.

Published in:

Advances in ICT for Emerging Regions (ICTer), 2012 International Conference on

Date of Conference:

12-15 Dec. 2012