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A 60GHz power amplifier using high common-mode rejection technique

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4 Author(s)
Minami, R. ; Dept. of Phys. Electron., Tokyo Inst. of Technol., Tokyo, Japan ; Bunsen, K. ; Okada, K. ; Matsuzawa, A.

This paper proposes the method of realization of high common-mode rejection ratio(CMRR) at 60 GHz. High CMRR can compensate the differential mismatch. In the proposed method, virtual ground for differential-mode and LC peaking for common-mode are utilized. To confirm the effect of this technique, the 2-stage differential power amplifier is fabricated in a 65nm CMOS process. It achieves a CMRR of 26 dB, a power gain of 12.1 dB, a peak PAE of 11.1%, a Psat of 9.0 dBm, a power consumption of 45.8mW from a 1.0V power supply.

Published in:

Microwave Conference Proceedings (APMC), 2012 Asia-Pacific

Date of Conference:

4-7 Dec. 2012

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