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Monolithic Power-Combining Techniques for Watt-Level 2.4-GHz CMOS Power Amplifiers for WLAN Applications

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2 Author(s)
Ali Afsahi ; Department of Electrical and Computer Engineering, University of California at San Diego, La Jolla, CA, USA ; Lawrence E. Larson

Two monolithic power combining schemes for CMOS power amplifiers (PAs)-distributed LC and current-mode transformer-based-are compared. Fully integrated 2.4-GHz PAs using these techniques were fabricated in a 65-nm standard CMOS technology. From a 3.3-V supply, the distributed-LC combined PA produces a saturated power of 31.5 dBm with peak power-added efficiency (PAE) of 25%. The current-mode transformer-based PA combiner produces 33.5-dBm saturated power with 37.6% peak PAE. With gm -linearization and digital pre-distortion, these PAs transmit 25.5 and 26.4 dBm with - 25-dB error vector magnitude for a 54-Mb/s orthogonal frequency division multiplexing signal, respectively.

Published in:

IEEE Transactions on Microwave Theory and Techniques  (Volume:61 ,  Issue: 3 )