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Circuit techniques in a 266-MHz MMX-enabled processor

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16 Author(s)
D. Draper ; Adv. Micro Devices Inc., Sunnyvale, CA, USA ; M. Crowley ; J. Holst ; G. Favor
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The AMD-K6 MMX-enabled processor is plug-compatible with the industry-standard Socket 7 and is binary compatible with the existing base of legacy X86 software. The microarchitecture is based on an out-of-order, superscalar execution engine using speculative execution. High performance and compact die size are achieved by using self-resetting, self-timed and pulsed-latch circuit design techniques in custom blocks and placed-and-routed blocks of standard cells. The 162 sq. mm die is fabricated on a 0.35-μm, five-layer metal process with local interconnect. It is assembled into a ceramic pin grid array (PGA) using C4 flip-chip mounting. The processor functions at clock speeds up to 266 MHz

Published in:

IEEE Journal of Solid-State Circuits  (Volume:32 ,  Issue: 11 )