Cart (Loading....) | Create Account
Close category search window

Guest Editors' introduction: On-chip structures for smarter silicon

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

The purchase and pricing options are temporarily unavailable. Please try again later.
2 Author(s)
Tehranipoor, M. ; Electrical and Computer Engineering Dept., University of Connecticut, Storrs, ; Winemberg, L.

This special issue presents novel on-chip structures for monitoring aging and variations in the circuit, analyzing circuit operation condition's impact on aging and performance degradation, agingaware power/performance tuning, interoperability and optimization for SerDes, and finally using onchip power monitors for detection of hardware Trojans in integrated circuits. Five papers were selected for publication in this special issue.

Published in:

Design & Test of Computers, IEEE  (Volume:29 ,  Issue: 5 )

Date of Publication:

Oct. 2012

Need Help?

IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.