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An integrated switched-capacitor (SC) power converter is presented in this paper, focusing on input current surge and switching noise suppression. By incorporating an adaptive on-chip surge suppression feedback loop, di/dt switching noise is significantly suppressed, and the start-up inrush current surge can also be greatly reduced. Furthermore, a preemptive timing control scheme is proposed to provide clock signals for each power switch with precisely controlled switching sequence and phase delays, contributing to further switching noise reduction. The proposed converter was fabricated with the AMIS 0.5-μm CMOS process. As the input varying from 2.7 to 4.2 V, the output voltage is regulated at 5 V, with a maximum load current of 25 mA. Compared to a conventional interleaved SC power converter, the proposed design demonstrates 74.7% and 80.9% reductions on the start-up inrush current surge and steady-state input current perturbation, respectively, and a 60.2% output switching noise reduction. The peak efficiency of 90.2% is measured at 2.7-V input and 100-mW load.