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Programmable CMOS/Memristor Threshold Logic

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3 Author(s)
Ligang Gao ; Dept. of Electr. & Comput. Eng., Univ. of California at Santa Barbara, Santa Barbara, CA, USA ; Alibart, F. ; Strukov, D.B.

This paper proposes a hybrid CMOS/memristor implementation of a programmable threshold logic gate. In this gate, memristive devices implement ratioed diode-resistor logic, while CMOS circuitry is used for signal amplification and inversion. Due to the excellent scaling prospects and nonvolatile analog memory of memristive devices, the proposed threshold logic is in-field configurable and potentially very compact. The concept is experimentally verified by implementing a 4-input symmetric linear threshold gate with an integrated circuit CMOS flip-flop, silicon diodes, and Ag/a-Si/Pt memristive devices.

Published in:

Nanotechnology, IEEE Transactions on  (Volume:12 ,  Issue: 2 )