By Topic

Design of Bidirectional and Low Power Consumption Gate Driver in Amorphous Silicon Technology for TFT-LCD Application

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

5 Author(s)
Guang-Ting Zheng ; Dept. of Electron., Nat. Tsing-Hua Univ., Hsinchu, Taiwan ; Po-Tsun Liu ; Meng-Chyi Wu ; Li-Wei Chu
more authors

A new gate driver has been designed and fabricated by amorphous silicon (a-Si) technology. With utilizing four clock signals in the design of gate driver on array (GOA), the pull-up transistor has ability for both output charging and discharging, and layout size of the proposed gate driver can be narrowed for bezel panel application. Moreover, lower duty cycle of clock signals can decrease static power loss to further reduce the overall power consumption of the proposed gate driver. The scan direction of the proposed gate driver can be adjusted by switching two direct control signals to present the reversal display of image. The proposed gate driver has been successfully demonstrated in a 4.5-inch WVGA (480 × RGB × 800) TFT-LCD panel and passed reliability tests of the supporting foundry.

Published in:

Journal of Display Technology  (Volume:9 ,  Issue: 2 )