Enhancement of Frequency Synthesizer Operating Range Using a Novel Frequency-Offset Technique for LTE-A and CR Applications

This paper presents a novel frequency-offset technique to enhance operating range of frequency synthesizers for long-term evolution-advanced and cognitive-radio applications. Conventional wideband frequency synthesizers typically have complex architectures, such as multiple phase-locked loops (PLLs), multiple voltage-controlled oscillators, and multiple mixers, to increase operating range. These complex architectures have high cost and power consumption. In this study, the proposed technique substantially increases the operating range of the frequency synthesizer by using only a single PLL to simultaneously lock two mixing oscillators. The presented frequency synthesizer is implemented using
${\hbox {0.18-}}\mu{\hbox {m}}$
CMOS technology. Performance tests demonstrate that the frequency synthesizer achieves a very wide operating frequency range from 50 MHz to 4.8 GHz with a phase noise lower than
$-{{\hbox {100 dBc/Hz}}}$
at a frequency offset of 100 kHz. The period of stability for a switching frequency of 40 MHz is shorter than
${\hbox {40}}~\mu{\hbox {s}}$
.