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This paper presents an accurate and robust compact model for high-voltage MOS (HV-MOS) transistors for high-voltage IC simulation. This model describes the extended-drain MOS and lateral double-diffused HV-MOS effects such as quasi-saturation, gm reduction, self-heating, impact ionization, output conductance, and charge/capacitance effects accurately. In addition, the quasi-saturation effects are, for the first time, illustrated with a simple mathematic formulation. This model is developed with BSIM4 as the base and validated extensively with technology computer-aided design and measurement for wide ranges of power supplies and operating temperatures.