Referenced Items are not available for this document.
This paper presents a single-chip video display processing SoC design, which is able to provide the complete post-processing solution for Full HD LCD TV. Three novel integrated key techniques have been discussed in detail, including multi-port AXI bus controller, robust film-mode detection and edge-directed content adaptive image interpolation. The overall architecture and algorithms are verified in FPGA platform and fabricated at TSMC 0.13 μm 1P6M CMOS technology node. The SoC chip is also extensively evaluated in a digital HDTV prototype system.
Published in:
SoC Design Conference (ISOCC), 2012 International
Date of Conference: 4-7 Nov. 2012
- Page(s):
- 297 - 300
- E-ISBN :
- 978-1-4673-2988-0
- Print ISBN:
- 978-1-4673-2989-7
- INSPEC Accession Number:
- 13229072
- Conference Location :
- Jeju Island
- Digital Object Identifier :
- 10.1109/ISOCC.2012.6407099
- Product Type:
- Conference Publications
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