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A track-and-hold amplifier for 1GSps 8bit ADC in 0.18 µm CMOS process

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4 Author(s)
Yi Zhang ; Inst. of RF- & OE-ICs, Southeast Univ., Nanjing, China ; Qiao Meng ; Qing Huang ; Kai Tang

A track-and-hold amplifier (THA) for 1GSps 8bit pipelined folding and interpolation (F&I) ADC is realized in TSMC 0.18 μm 1p6m CMOS process. The THA adopts bootstrapped switch instead of simple MOS switch. Dummy transistors and duplicated source follower are also taken to improve its performance. Post simulation results prove that the THA achieves a SNDR of 51.1dB at Nyquist sampling rate. Under a 1.8V supply, its power is 29mW. Simulation results of the F&I ADC demonstrate that the THA is suitable for the application.

Published in:

Advanced Technologies for Communications (ATC), 2012 International Conference on

Date of Conference:

10-12 Oct. 2012