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Reconfigurable CMOS divide-by-3/-5 injection-locked frequency divider for dual-mode 24/40 GHz PLL application

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4 Author(s)
Tzuen-Hsi Huang ; Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan ; Sih-Han Li ; Pei-Kang Tsai ; Chin-Chih Liu

This paper presents a dual-mode injection-locked frequency divider (ILFD) which can operate at 24 or 40 GHz. By a switchable band pass filter (BPF) design, the second harmonic of output frequency appeared at the common node of the differential injection pair can be either peaked or suppressed. At the same time, the fourth harmonic can be suppressed or peaked in contrary. The input injection signal can mix with the correspondingly peaked harmonic to achieve the division-by-3 or division-by-5 function. With an injection power level of +4 dBm, the locking ranges of 3.2 GHz (for division-by-3) and 880 MHz (for division-by-5) are achieved as the tuning voltage Vtune is fixed at 1.8 V. The total operation ranges for the division-by-3 and division-by-5 modes are from 22.5 to 27.0 GHz and from 38.23 to 41.55 GHz, respectively, as Vtune increases from 0 to 1.8 V. The divider core consumes 17.02 mW at 1 V supply voltage and the output buffers totally consume 3.0 mW at 1.8 V.

Published in:

Radio-Frequency Integration Technology (RFIT), 2012 IEEE International Symposium on

Date of Conference:

21-23 Nov. 2012