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Invited talk: Noise and mismatch in sub 28nm silicon processes

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1 Author(s)
Marshall, A. ; Adv. CMOS Technol. Dev., Texas Instrum., Dallas, TX, USA

Mismatch and noise cause significant yield loss in 28nm and smaller process nodes. This paper examines these effects in analog, digital, RF and memory circuits, along with methods to quantify, account for and counteract problems associated with them.

Published in:
SOC Conference (SOCC), 2012 IEEE International

Date of Conference: 12-14 Sept. 2012

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