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Simple Digital Pulse Width Modulator with 60 picoseconds resolution using a low-cost FPGA

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3 Author(s)
Costinett, D. ; ECEE Dept., Univ. of Colorado at Boulder, Boulder, CO, USA ; Rodriguez, M. ; Maksimovic, D.

This paper describes a very simple Digital Pulse Width Modulator (DPWM), with under 100 picoseconds resolution capability in low-cost field-programmable gate arrays (FPGA). The DPWM implementation is based on internal carry chains and internal logic resources which are present in most FPGA families. The proposed approach does not require manual routing or placement, consumes few hardware resources, and does not rely on specialized phase locked loop or clock management resources. The DPWM is capable of supporting high switching frequencies for digitally controlled switched-mode power converters. A 50 MHz switching frequency DPWM with 60 picoseconds resolution and a 1 MHz switching frequency DPWM with 90 picoseconds resolution are experimentally demonstrated, with monotonicity and excellent linearity.

Published in:

Power Electronics and Motion Control Conference (EPE/PEMC), 2012 15th International

Date of Conference:

4-6 Sept. 2012