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A symbolic simulation-based ANSI/IEEE Std 1149.1 compliance checker and BSDL generator

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3 Author(s)
Singh, H. ; Synopsys Inc., Mountain View, CA, USA ; Patankar, G. ; Beausang, J.

The paper shows how to extract the boundary-scan circuitry from an IC (Integrated Circuit), verify its compliance to IEEE Std 1149.1 and generate its BSDL (Boundary Scan Description Language) description. This work applies to the 75% of boundary-scan ICs that have hand-generated or macro-cell based boundary-scan circuity. It also applies to boundary-scan ICs designed using RTL (Register Transfer Level) synthesis

Published in:

Test Conference, 1997. Proceedings., International

Date of Conference:

1-6 Nov 1997