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This paper introduces extended correlated double sampling (ECDS) as a new gain-calibration technique in pipelined analog-to-digital converters (ADCs). The proposed calibration simultaneously improves the effective dc gain and increases the maximum output swing of the opamps with given overdrive voltages. Furthermore, ECDS is immediate, thus avoiding the long convergence time associated with many background calibration schemes. This characteristic makes it desirable for applications where the ADC is on only briefly, such as wireless sensor networks (WSNs). An 11-bit 40-MS/s prototype pipelined ADC has been fabricated in 0.25-μm CMOS to demonstrate the proposed calibration technique. The active die area is 3.8 mm2 , and the analog power dissipation is 85 mW from a 2.5-V supply. With a 72-kHz input frequency, ECDS improves signal-to-noise-and-distortion ratio from 40.1 to 63.4 dB and spurious-free dynamic range from 41.8 to 75.7 dB.