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Sampling Decision System in semiconductor manufacturing using Virtual Metrology

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3 Author(s)
Kurz, D. ; Infineon Technol. Austria, Alpen-Adria Univ. of Klagenfurt, Klagenfurt, Austria ; DeLuca, C. ; Pilz, J.

In semiconductor manufacturing, metrology operations are so expensive and time-consuming that only a certain number of wafers are measured. For that reason, one is interested in developing Virtual Metrology (VM) methodologies predicting wafer fine metrology results in real-time and free of costs. However, currently used sampling designs do not take account of such information. In this paper, we present a sampling decision system (SDS) that relies on virtual metrology data suggesting an optimal strategy for measuring productive wafers. Considering control charts within a decision-theoretical framework, the expected value of measurement information is computed by means of Monte Carlo (MC) integration; this is a way to assess the informational gain resulting from a measurement. Optimal sampling decisions are obtained using a two-stage decision model. Extensions of the SDS consider bad wafer quality risk and fixed real metrology operations by cumulating past decision risks. A Bayesian conjugate Wishart model allows to update uncertainty of virtual measurements whenever a real measurement is available. The sampling decision system is extended to a set of virtual and real metrology data from the semiconductor industry. Wafer measurements are only performed when really needed.

Published in:

Automation Science and Engineering (CASE), 2012 IEEE International Conference on

Date of Conference:

20-24 Aug. 2012