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A 22-GHz low-power frequency synthesizer in 0.18-um CMOS

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3 Author(s)
Ching-Yuan Yang ; Dept. of Electr. Eng., Nat. Chung Hsing Univ., Taichung, Taiwan ; Jia-Jiun Lin ; Chih-Hsiang Chang

The paper presents the design and realization of frequency synthesizer based on a phase-locked loop together with frequency-doubling and fractional phase-rotating techniques. To achieve lower power design, a current-reused technique is employed on the combiner of quadrature voltage-controlled oscillator and frequency doubler and the other combiner of injection-lock frequency divider and phase rotator. The synthesizer provides the tuning range of 21.2 to 22.4 GHz and dissipates 28 mW. The measured phase noise is -106.7 dBc/Hz from 1-MHz offset.

Published in:

Communications and Information Technologies (ISCIT), 2012 International Symposium on

Date of Conference:

2-5 Oct. 2012