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Sparsification of Dense Capacitive Coupling of Interconnect Models

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4 Author(s)
Miettinen, P. ; Sch. of Electr. Eng., Dept. of Radio Sci. & Eng., Aalto Univ., Aalto, Finland ; Honkala, M. ; Roos, J. ; Valtonen, M.

Parasitic elements play a major role in advanced circuit design and pose considerable run-time and memory problems for the post-layout verification, especially in the case of full-chip extraction. This brief presents a realizable R(L)C(M)-netlist-in-R(L)C(M)-netlist-out method to sparsify and reduce the capacitive coupling parasitics in circuits with interconnect lines. The method is applicable in conjunction with partitioning-based model-order reduction algorithms to reduce the complete extracted netlists, or as a stand-alone tool to process only the capacitive coupling. It is shown that, by using the method, circuits with even dense capacitive coupling can be partitioned and reduced efficiently.

Published in:

Very Large Scale Integration (VLSI) Systems, IEEE Transactions on  (Volume:21 ,  Issue: 10 )