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The electrical performance of low-temperature polysilicon (LTPS) thin-film transistors (TFTs) has improved considerably in the last decade, due to the flourishing active-matrix liquid crystal display industry. However, there is a need to further scale down LTPS TFT devices on flexible substrates to explore other application domains. In order to realize this goal, self-heating-induced negative bias temperature instability (NBTI) in LTPS TFTs needs to be modeled to determine its effect on transistor degradation and to develop mitigation techniques. Although the characteristics of NBTI for TFTs are widely known, the effects of device geometry and substrate on temperature-dependent NBTI have not been considered. In this paper, for the first time, a self-consistent electrothermal model that considers the effects of device geometry, substrate, and stress conditions on NBTI is proposed. With the proposed modeling methodology, we show the significant impact of device geometry, substrate, and supply voltage on NBTI in LTPS TFTs.
Date of Publication: Jan. 2013