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As the number of leads, or pins, on the dual-in-line package (DIP) increases, its size increases rapidly. DIPs are becoming up to 50 times bigger than the chips themselves, thus defeating the gains of miniaturization resulting from IC advances. A pin-grid array package with leads protruding from the bottom, can handle 256 leads in an area of about 3 square inches. New packages that are becoming available for integrated circuits are described, and the way in which these packages are attached to printed circuit boards is considered. Small-outline integrated circuits, plastic leaded chip carriers, ceramic leaded chip carriers, leadless ceramic chip carriers, and pin-grid arrays are covered. It is pointed out that if metal leads could be eliminated entirely, electrical signal delay and nonuniformity could be greatly reduced. A technique for doing this is tape-automated bonding in which chips may be applied directly to printed-circuit boards.