Referenced Items are not available for this document.
A novel D-Flip-Flop design using hysteresis to improve single-event hardness with low performance overhead is presented. Layout-aware sensitive area simulations were used to estimate the improvement in cross-section for the proposed hysteresis DFF (HDFF) vs. a standard DFF. A test chip with the standard DFF, HDFF, and the DICE FF was designed in a 28 nm CMOS process and exposed to alpha, neutron, and heavy-ion beams. The HDFF design shows 14× and 3× improvements in the alpha and neutron SER, respectively, compared with a standard DFF.
Published in:
Nuclear Science, IEEE Transactions on
(Volume:59
,
Issue:
6
)
Date of Publication: Dec. 2012
- Page(s):
- 2847 - 2851
- ISSN :
- 0018-9499
- INSPEC Accession Number:
- 13169778
- Digital Object Identifier :
- 10.1109/TNS.2012.2223762
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 17 January 2013
- Issue Date :
- Dec. 2012
- Sponsored by :
- IEEE Nuclear and Plasma Sciences Society
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