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Heavy ion, neutron, and laser experimental data are used to evaluate the effectiveness of various single event latchup (SEL) hardening strategies, including silicon-on-insulator (SOI), triple well, and guard rings. Although SOI technology is widely reported to be immune to SEL, conventional pnpn latchup can occur and has been observed in non-dielectrically isolated SOI processes. Triple well technologies are shown to be more robust against SEL than dual well technologies under all conditions used in this study, suggesting that the introduction of a deep N-well is an excellent zero-area-penalty hardening strategy. A single guard ring is shown to be sufficient for SEL immunity in the 180 nm CMOS technology investigated, and is likely sufficient for more modern CMOS technologies. After triggering latchup in a certain pnpn region, latchup was observed to spread to neighboring pnpn regions, which then infected other more distant regions until it had spread over a total distance of 700 micrometers. We discuss the physical mechanism of this latchup domino effect and its implications for device characterization and hardness assurance.
Date of Publication: Dec. 2012