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Adaptive Cache Aware Bitier Work-Stealing in Multisocket Multicore Architectures

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3 Author(s)
Quan Chen ; Dept. of Comput. Sci. & Eng., Shanghai Jiao Tong Univ., Shanghai, China ; Minyi Guo ; Zhiyi Huang

Modern multicore computers often adopt a multisocket multicore architecture with shared caches in each socket. However, traditional work-stealing schedulers tend to pollute the shared cache and incur more cache misses due to their random stealing. To relieve this problem, this paper proposes an Adaptive Cache-Aware Bi-tier work-stealing (A-CAB) scheduler. A-CAB improves the performance of memory-bound applications by reducing memory footprint and cache misses of tasks running inside the same CPU socket. A-CAB adaptively uses a DAG partitioner to divide an execution Directed Acyclic Graph (DAG) into the intersocket tier and the intrasocket tier. Tasks in the intersocket tier are scheduled across sockets while tasks in the intrasocket tier are scheduled within the same socket. Experimental results tell us that A-CAB can improve the performance of memory-bound applications up to 74.4 percent compared with the traditional work-stealing.

Published in:

Parallel and Distributed Systems, IEEE Transactions on  (Volume:24 ,  Issue: 12 )

Date of Publication:

Dec. 2013

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