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Interface quality of Sc2O3 and Gd2O3 films based metal–insulator–silicon structures using Al, Pt, and Ti gates: Effect of buffer layers and scavenging electrodes

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8 Author(s)
Gomez, Alfonso ; Departamento de Electricidad y Electrónica, E.T.S.I. Telecomunicación, University of Valladolid, 47011 Valladolid, Spain ; Castan, Helena ; Garcia, Hector ; Duenas, Salvador
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In this work, the electrical characterization of Gd2O3 and Sc2O3-based metal–insulator–silicon (MIS) structures has been performed using capacitance–voltage, deep level transient spectroscopy, conductance transients, flat-band voltage transients, and current–voltage techniques. High-k films were deposited by high pressure sputtering using Sc and Gd metallic films in a pure Ar plasma and, subsequently, in situ room temperature plasma oxidation in a mixed Ar/O2 atmosphere was performed. Three different metals were used as gate electrodes: aluminium, platinum, and titanium, in order to check electrical differences of the samples and to check the interface scavenging after high-k dielectric deposition. In particular, it was proved that Ti electrode is a well SiO2 interlayer scavenger for both materials. Additionally, the authors observed that the predominant conduction mechanism for these high-k based-MIS structures is Poole–Frenkel emission, as usually reported for high-k dielectrics.

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Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures  (Volume:31 ,  Issue: 1 )