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Variable-Precision Distributed Arithmetic (VPDA) MIMO Equalizer for Power-and-Area-Efficient 112 Gb/s Optical DP-QPSK Systems

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2 Author(s)
Soon-Won Kwon ; Dept. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol. (KAIST), Daejeon, South Korea ; Hyeon-Min Bae

A variable-precision distributed arithmetic (VPDA) multi-input multi-output (MIMO) equalizer is presented to reduce the size and dynamic power of 112 Gb/s dual-polarization quadrature phase-shift-keying (DP-QPSK) coherent optical communication receivers for 80 km metro applications. The VPDA MIMO equalizer compensates for channel dispersion as well as various non-idealities of a time-interleaved successive approximation register (SAR) based analog-to-digital converter (ADC) simultaneously by using a least mean square (LMS) algorithm. As a result, area-hungry analog domain calibration circuits are not required. In addition, the VPDA MIMO equalizer achieves 45% dynamic power reduction over fixed resolution counterparts by utilizing the minimum required resolution for the equalization of each dispersed symbol.

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Lightwave Technology, Journal of  (Volume:31 ,  Issue: 2 )