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A variable-precision distributed arithmetic (VPDA) multi-input multi-output (MIMO) equalizer is presented to reduce the size and dynamic power of 112 Gb/s dual-polarization quadrature phase-shift-keying (DP-QPSK) coherent optical communication receivers for 80 km metro applications. The VPDA MIMO equalizer compensates for channel dispersion as well as various non-idealities of a time-interleaved successive approximation register (SAR) based analog-to-digital converter (ADC) simultaneously by using a least mean square (LMS) algorithm. As a result, area-hungry analog domain calibration circuits are not required. In addition, the VPDA MIMO equalizer achieves 45% dynamic power reduction over fixed resolution counterparts by utilizing the minimum required resolution for the equalization of each dispersed symbol.